input logicの例文

例文

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1. Additionally, the asymmetric input logic levels make PMOS circuits susceptible to noise.
2. For example, the 74LVC1G386 microchip is advertised as a three-input logic gate, and implements a parity generator.
3. This problem was solved by the invention of the 74HCT family of devices that uses CMOS technology but TTL input logic levels.
4. This two-input logic gate is the first of its kind and displays non-commutative behaviour with chemical inputs and a phosphorescence output.
5. Instead of alternating NPN and PNP stages, another coupling method employed zener diodes and resistors to shift the output logic levels to be the same as the input logic levels.